Look-up table circuits store logics in memories, and control outputs based on the contents of data stored in the memories. Reconfigurable circuits including look-up table circuits are capable of dealing with arbitrarily selected logical operations, but are difficult to be highly integrated since the number of elements in look-up table circuits is large.
Look-up table circuits formed by using complementary metal oxide semiconductor (CMOS) techniques may include static random access memories (SRAMs) to store data. This configuration includes a large number of elements, which is one of the reasons the look-up table circuits cannot be highly integrated. Furthermore, the SRAMs are volatile memories which lose data when the power is turned off. Therefore, every time the power is turned on, data having been saved in external memories should be rewritten to the SRAMs.
This may take time and effort. Furthermore, the external memories for saving data when the power is turned off should always be kept. This may increase the power consumption and increase the entire size. For the above reasons, the entire system cannot be highly integrated or decrease power consumption.
A look-up table circuit with four inputs and one output, which is typically used in a field programmable gate array (FPGA), includes as many as about 166 elements. A SRAM included in the FPGA includes about 96 elements. Thus, the ratio of the SRAM in the total number of elements in the look-up table circuit is large. Therefore, reducing the number of elements in SRAM leads directly means reducing the number of the entire elements in a look-up table circuit. Since the look-up table circuit is a basic circuit in an FPGA, reducing the number of elements in a look-up table circuit would lead to high integration.